Tuesday, 5 February 2013

Design of Cntfet Based Logic Gates for Ultra Low Power Applications

Vol. 2 No. 4

Year: 2012

Issue: June-August

Title: Design of Cntfet Based Logic Gates for Ultra Low Power Applications 

Author Name: V. Saravanan, V. Kannan 

Synopsis: 

This Paper Proposes The Design Of Logic Gates For Ultra Low Power Applications. The Logic Gate Has Been Designed In 18 Nm Technologies. In This Paper Carbon Nanotube Field Effect Transistors (Cntfet) Are Introduced For Designing   The Digital Circuits. This Paper Presents The Performance Analysis Of Carbon Nanotube Field Effect Transistor (Cntfet), Structure, Types Of The New Nano Device, Operation, And   Various Gate   Circuit Design Using Cntfet. Results Of The Proposed Design Are Compared With Cmos Based Gates. All The Simulations Are Done In Hspice.

Design and implementation of EEG Measuring System

Vol. 2 No. 4

Year: 2012

Issue: June-August

Title: Design and implementation of EEG Measuring System 

Author Name: Safaa S. Mahdi, Mahir R. Alhajjaj 

Synopsis: 

Electroencephalograph (EEG) is a technique commonly used in medical and research fields to record the electrical activities of the brain. The EEG signals are recorded from the surface of the scalp metallic electrodes. The EEG signals are within the range of (0.5-50µV), the raw signals are originated from different areas of the brain. The locations of these electrodes on the scalp are specified according to the 10-20 international system. Measuring the EEG signals is usually difficult due to small signal magnitude of the EEG signals and large DC offset voltage incorporated with the measuring process. The DC-offset in EEG signal is a result of many factors, like electrode-skin interface, amplifier input bias current mismatch, input impedance, offset voltage, and voltage drift with temperature and aging. The signal is amplified in two stages and digitized using a 24-bit analog to digital convertor (ADC). The DC-offset was treated using auto-zeroing technique, along with the use of high precision electronic components. The theoretical design was first simulated using TINA-TI software, then the PCB's were designed using Eagle software, and implemented experimentally. EEG signals were acquired and recorded for different people and it seems satisfactory for the diagnosis by doctors.    

Analysis of Vftos across Insulating Flange of 420 Kv Gis

Vol. 2 No. 4

Year: 2012

Issue: June-August

Title: Analysis of Vftos across Insulating Flange of 420 Kv Gis 

Author Name: A. Raghu Ram 

Synopsis: 

In gas insulated substations (GIS) very fast transient overvoltages (VFTO) are generated due to disconnector switching operations. Disconnector switches are primarily used to isolate the operating sections of HV installation from each other as a safety measure. Very fast transient over voltages at an insulating flange are generated due to propogation of VFTOs on the conductor of a gas bus in GIS.Genaration of VFTOs causes sparkovers across insulating flange of high pressure oil filled cable/GIS interface. The ionised path formed by the sparkovers create low impedance path for power frequency fault current, resulting in flange damage with serious consequences. This paper deals wih the generation of VFTOs across insulating flange and their suppression using shunting bars and capacitors for providing protection have been analyzed and reported using MATLAB 7.0.

Controller Design for Automated Drug Delivery Unit

Vol. 2 No. 4

Year: 2012

Issue: June-August

Title: Controller Design for Automated Drug Delivery Unit 

Author Name: Vipeesh P, N.J.R. Muniraj 

Synopsis: 

Disease classification and drug diffusion are the two major tasks that have to be performed by automated drug delivery unit. Both these operations have to be performed with utmost care and the performance of the system should be reliable and reproducible. The electrical signals that are produced by the sensor array network, that indicate the concentration of analyte solution based on the kind of disease being detected, is used as the input to the classification problem. The developed model is used for classification cancer data obtained from the sensor array network. In this paper design of controller for drug diffusion is also presented. Both the novel algorithm based expert system and the controller logic for drug diffusion to measure and analyze the real time performance of the system. A detailed discussion on the design, modelling and implementation of the expert system and drug delivery unit is presented.

Disturbance Rejection of Nanopositioner Using Internal Model Control

Vol. 2 No. 4

Year: 2012

Issue: June-August

Title: Disturbance Rejection of Nanopositioner Using Internal Model Control 

Author Name: Sheilza Jain, Maneesha Garg, A. Swarup 

Synopsis: 

Nanopositioning, the precise control and manipulation of devices and materials at nanoscale, plays an important role in all applications of nanotechnology. Nanopositioners are designed to move objects over a small range with a resolution down to a fraction of an atomic diameter.  The primary objectives of nanopositioners include fast response with very little or no overshoot, large travel range, very high resolution, extremely high precision and high bandwidth.   Performance characteristics of the system can be improved by the use of feedback controller. Complexity of controller depends upon model of the plant/process and objectives of the control system. The primary objectives of control system are to obtain fast and accurate set point tracking as well as efficient disturbances rejection. The Internal model control (IMC) structure is a suitable control system for satisfying these objectives. This paper presents the identification of nanopositioning device and analyzes its open loop behavior.  The IMC scheme is implemented on non-minimum phase nanopositioning devices and is verified for set point changes and disturbance rejection. The proposed control scheme possesses good robustness against set point changes and disturbance rejection. In this paper, performance specifications of nanopositioning system with IMC structure are also compared with traditional PID controller tuning algorithms. Results simulated on MATLAB demonstrate its effectiveness and versatility for precise positioning. 

Monday, 4 February 2013

Parametric Influence on Noise in High Electron Mobility Transistor LNA

Vol. 2 No. 3

Year: 2012

Issue: Mar-May

Title: Parametric Influence on Noise in High Electron Mobility Transistor LNA 

Author Name: V.J.K. Kishor Sonti, V. Kannan 

Synopsis: 

In this paper, parametric influence on noise in HEMT LNA designed using FR4 substrate was analyzed. At higher frequencies of operation high electron mobility transistor designs are often influenced by shot noise and this shot noise is depended on different parameters of the device. This design is carried out at a centre frequency of 5.8GHz and critical parameters like gate resistance, transconductance; gate source biasing values influence on noise immunity of this design is analyzed in the frequency range of 1GHz to 10GHz. Variation of Maximum Gain and Noise Figure w.r.t to frequency were obtained for different parametric values. Obtained results had given better understanding of the noise influence on the design performance under different constraints pertained to parameter variation. These observations are in greater agreement with the theoretical facts. This work is carried out using ADS simulation software.



  


 


 
 



 
 

   
  


 
     

Investigations of Current Mechanisms and Electronic Properties of Schottky Barrier Diode

Vol. 2 No. 3

Year: 2012

Issue: Mar-May

Title: Investigations of Current Mechanisms and Electronic Properties of Schottky Barrier Diode 

Author Name: Wagah F. Mohammad, Nada Nabil Khatib 

Synopsis: 

The energy band diagram and space charge regions of Schottky barrier (SB) solar cells are different from normal pn solar cells.  Many facts and theories must be studied and developed to assist understanding and implementing SB solar cells.  Few samples of SB devices were prepared by thermal deposition under vacuum then tested and studied carefully.  An interfacial layer was introduced between metal and semiconductor.  I-V and C—V are measured, drawn and discussed in details.  The current transportation mechanism of the prepared samples is found to be of thermal mechanism type.  The current transportation depends on the potential barrier height.  From C— V characteristics, it is found that the potential barrier height is decreased as the interfacial oxide becomes thicker.