Performance Analysis of Modified Source Junctionless Fully Depleted Silicon-on-Insulator MOSFET

Volume 8 Issue 2 December - February 2018

Research Paper

Performance Analysis of Modified Source Junctionless Fully Depleted Silicon-on-Insulator MOSFET

Manvendra Chauhan*, Rajeev Kumar Chauhan**

PG Scholar, Department of Electronics and Communication Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.

Professor, Department of Electronics and Communication Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India

Chauhan. M. S and Chauhan. R. K (2018). Performance Analysis of Modified Source Junctionless Fully Depleted Silicon-on-Insulator MOSFET. i-manager's Journal on Electronics Engineering, 8(2), 44-50. https://doi.org/10.26634/jele.8.2.14140

Abstract

In this paper, the authors have presented a junctionless Fully Depleted Silicon on Insulator (FDSOI) Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET) with a source engineering on an intrinsic silicon body, with the purpose to improve I /I ratio of a transistor at low thermal budget process. The proposed device consists of a very ON OFF small region of high doping, over dopingless region of the source. The charge plasma concept is also employed to introduce charge plasma on the source and drain region, by using metal electrodes of appropriate work function. In this way, dopingless region of the source and drain gets electrostatically induced, whereas charge carrier density rises in an already doped region of the source. This makes the proposed device to combine the benefits of modified source fully depleted silicon-on-insulator MOSFET (MS FDSOI MOSFET) (i.e., high I current and I /I ratio) and conventional ON ON OFF junctionless transistors plus the transistors with intrinsic Source/Drain (S/D) regions (i.e., low thermal budget process). The electrical properties of the proposed device are simulated and compared with that of conventional MS FDSOI MOSFET.