FPGA Implementation of Reversible Logic Gates

Volume 8 Issue 3 March - May 2018

Research Paper

FPGA Implementation of Reversible Logic Gates

Gowthami P.*, R.V.S. Satyanarayana**

* Research Scholar, Department of Electronics and Communication Engineering, SV University College of Engineering, Tirupati, Andhra Pradesh, India.

** Professor, Department of Electronics and Communication Engineering, SV University College of Engineering, Tirupati, Andhra Pradesh, India.

Gowthami. P and Satyanarayana. R.V.S. (2018). FPGA Implementation of Reversible Logic Gates. i-manager's Journal on Electronics Engineering, 8(3), 45-62. https://doi.org/10.26634/jele.8.3.14389

Abstract

Reversible logic is one of the emerging research areas having its application in the fields of Quantum computing, Optical computing, DNA computing, Nanotechnology, Cryptography, Bioinformatics etc. Reversible Logic has attained importance in the recent developments of high speed and low power digital systems. This has led to present data relating to the different reversible logic gates which are available in the literature. The Verilog Hardware Description Language (HDL) is used to code the reversible gates. The simulation and synthesis are carried out in Xilinx 14.3 Integrated Synthesis Environment (ISE).