Power Dissipation and Switching Speed Analysis of a CMOS Full adder in Deep Submicron and Nanoscale Technologies

Vol.1 No. 1

Year: 2010

Issue: Sep-Nov

Title: Power Dissipation and Switching Speed Analysis of a CMOS Full adder in Deep Submicron and Nanoscale Technologies 

Author Name: Manish Kumar, Anwar Hussain, L.L.K.Singh 

Synopsis:

Design of low power and high speed VLSI circuit has become a necessity for high performance portable devices operated by batteries. In this paper, power dissipation and switching speed of a 1- bit CMOS full adder in deep submicron and nanoscale technologies are analysed. Effects of variations in supply voltage and temperature on power dissipation and switching speed of a CMOS full adder are analysed. MICROWIND and DSCH 3.1 EDA tools are used for the schematic layout and simulation of a CMOS full adder in 0.4µm and 90 nm technologies using BSIM4 model.